(1) Field of the Invention
The present invention generally relates to computer software that manages the amount of voltage provided to a processing unit for optimizing the completion of computing tasks. More particularly, the present invention includes a program that determines the amount of voltage supply to a processing unit that will result in the highest number of completed operations for a task, without overheating the processing unit; that power level and operations count is then stored in association with an identifier unique to that task, to enable the operating system to provide that power level for the next processing of that task.
In general, a computer's operating system manages the software and hardware resources of the computer, and directs each Process (or application) to a processing unit for execution of its instructions in the sequence specified. Each program codes for one or more tasks, each of which may include one or more separate operations that may need to be completed en route to completion of the task or program. The operating system typically assigns each task a unique process identifier (“PID”), and assigns a processing unit to execute the Process code directing performance of each task; this execution is generally known as processing.
The operating system typically places each task into a scheduling queue until a processing unit is available to process the task. A processing unit may take the form of a single central processing unit (“CPU”), or functional subunits on that CPU sometimes called the processing “cores”. Besides the multi-core processing arrangements, computers may also contain multiple CPUs, each of which may include multiple functional subunits or cores.
Input or output data or other information associated with a Process and/or its task(s) (and/or a processing unit) may be stored in a memory structure, associated with a processing unit and/or peripheral devices. For most programs not requiring a great amount of time or memory for execution, input data needed for a task is stored in local cache memory, readily available to the processing unit assigned that task. Examples of such stored data include variables for the program, pointer locations and data structures (such as a data array).
Some computers such as laptops, desktops or mobile devices typically process mostly short or relatively simple tasks. Other computers are designed to process time-intensive, high-volume tasks; for example, the tasks required for some computations involved in genetic sequencing or atomic energy modeling may require the accessing and/or manipulation of large database collections, such as the cross referencing large data tables or the computation of complex mathematical calculations. Some programs or tasks may take hours, days or even weeks to process.
Generally, the typical personal computer is not programmed to process a program or task at its optimal performance level; rather, personal computers typically are programmed by manufacturers to maintain a lower, default level of readiness expected to satisfy the energy and processing needs of the typical user. This may be due to recognition that the execution of many common programs by personal computing devices (such as laptops, desktop workstations and mobile devices) requires only a relatively small amount of computing time, power and resources. Moreover, the limited amount of energy available to laptops and mobile devices (remote from an electrical outlet) often requires that the default level of power and performance be set at a relatively low level. Maintaining processing readiness and performance at a maximum level will unnecessarily drain the battery, while processing a task continuously at a maximum performance level may increase the temperature of the processing unit to a point that it may cause damage to the processing unit. Therefore, a manufacturer generally sets a default power level for a processing unit corresponding to a performance level for a task that may be substantially below the task's optimal performance level.
It is important that the maximum recommended processor temperature not be exceeded, to prevent damaging or destroying the processor chip. Some previous solutions for increasing performance were to decrease the processor chip die size so that it processed faster without increasing power consumption or heat. Still, the problem remained with processing a task at its optimal performance level. Although the task may be processed continuously or temporarily at any given performance level, the processing unit temperature reading should be still monitored. Increasing the power provided to the processing unit can be accomplished without compromising the processor chip.
Increasing processor performance may be accomplished by increasing its “clock frequency” and/or its voltage supply. The clock frequency and operating voltage are directly proportional to power consumption and processing unit temperature. However, since increasing voltage also decreases battery life in devices relying upon battery power, consumer-computing industry focus has often been on supplying only the minimal amount of power needed to accomplish the consumer-computing processing fast enough to be acceptable to the average consumer. Some solutions involve decreasing power consumption of a processor for execution of short or uncomplicated tasks, even if doing so would not result in optimal performance of the task. These systems typically seek to conserve battery charge for a mobile device, such as a laptop, or to increase power consumption only for temporary maximum performance. They do not teach or suggest incrementally increasing power (based on processor die size) for a specific task, for a subtask duration, until optimal processing performance has been achieved. Nor do they teach or suggest such a system that also monitors processing unit temperature to maintain a temperature at or below a failsafe temperature.
There is a need for incrementally increasing the processing unit voltage until optimal performance of a task is achieved, without exceeding a failsafe temperature. A need also exists for software that can count the number of operations completed during a subtask duration for a current task, increase the voltage to the processing unit incrementally based upon its die size until the most recent count stops exceeding the weighted average of the previous counts, and save the count of that subtask. A need exists for software that can determine whenever the temperature of a processing unit exceeds a failsafe temperature, and that can save the count of the immediately preceding subtask.
(2) Description of Related Art Including Information Disclosed 37 CFR 1.97 and 1.98.
The following patents are arguably material to the patentability of the invention disclosed herein:
1st NamedDate of Patent/U.S. patent/application No.InventorPublication6,442,700Cooper27 Aug. 20026,845,456Menezes18 Jan. 20056,895,520Altmejd17 May 200520060161375Duberstein20 Jul. 20067,254,721Tobias7 Aug. 20077,260,728Chang21 Aug. 20077,340,622Cox4 Mar. 20087,469,355Chong23 Dec. 20087,647,513Tobias12 Jan. 2010
U.S. Pat. No. 7,340,622 issued to Cox et al (the “Cox patent”) discloses a method and apparatus for selectively increasing the operating speed of an electronic circuit, essentially by sequentially increasing the clock speed for the circuit and the voltage supply to it, beginning from a “low” (sub-default) combination of clock speed and voltage yielding sub-default electrical consumption and operating frequency. When the circuit starts to perform computational work, a timer causes the computer to operate at the low level for a pre-set duration (10 ms for example), then the program increases both the voltage and frequency for another pre-set duration (10 ms for example). The computer then increases the voltage and frequency to the maximum sustainable levels (default, or manufacturer recommended) for a pre-set duration (10 ms for example); if the circuit temperature is above a threshold value, the circuit remains in that maximum sustainable voltage and frequency state. If the temperature is below that threshold value, the computer boosts the frequency and voltage above the maximum sustainable state for pre-set duration (40 ms for example), to recover the computational work “lost” in the preceding low-power states. If the temperature ever exceeds the threshold value, the circuit returns to the maximum sustainable frequency and voltage state.
The overall context of the Cox patent is to minimize consumption of electricity while the computer is in “idle” state and during the beginning of processing new tasks, facilitating energy-saving completion of processing requiring only sub-default power during short bursts of activity. Given the emphasis upon balancing circuit performance and power savings (and the fact that the patent is owned by Apple, Inc.), it can be inferred that the program or method of the Cox patent has utility in smaller, battery powered devices. Where power supply is not an issue, there is no need to balance circuit performance and power savings.
U.S. Pat. No. 6,895,520 issued to Altmejd et al (the “Altmejd patent”) discloses performance and power optimization through monitoring of utilization information feedback from each “functional block” of the computer, to reduce overall power consumption without unduly decreasing performance. This patent discloses a computer program that periodically (frequently) adjusts power consumption levels of the functional blocks to match respective block utilization levels according to block utilization information. The program tracks utilization information for each of the functional blocks on a task basis; when switching from a first task to a second task, the program adjusts power management parameters for one or more functional blocks according to utilization information corresponding to the second task. The operating system creates a power management profile (clock rate, voltage and dispatch rate) matching a desired performance level for each functional block for a plurality of tasks. When the operating system switches the processor to execute a different task, the power management controller sets the appropriate power management parameters to correspond to the particular task.
The overall concern of the Altmejd patent appears to be to quit diverting power to under-utilized functional units, while routing extra electricity to functional units being utilized more. Those parameters can be further adjusted during task execution to further improve power management. The utilization information may include a percentage of time that the block is used (or idle), such as might be calculated from the number of instructions dispatched to an execution unit over a predetermined period of time. The software periodically determines whether the power consumption (and performance) of the functional unit matches its load (utilization), then adjusts clock frequency, voltage and/or dispatch rate. The overall scheme appears to be to either increase power consumption and performance when the processing unit is (very recently was) busier than the default setting (upper utilization threshold), or decrease the power supply to (and performance readiness of) a processing unit that has recently experienced sub-default-level utilization (below a lower utilization threshold). Voltage may be increased in fixed steps, such as to match the clock speed of the functional unit.
U.S. Pat. Nos. 7,254,721 and 7,647,513 issued to Tobias et al. (the “Tobias patents”) disclose a system for controlling a circuit to enter a predetermined performance state (voltage/frequency pairs) by skipping intermediate states based on the determined utilization of the circuit. These patents disclose a computer that periodically determines processor utilization and increases voltage and/or frequency if it is above a pre-set high threshold, or decreases voltage and/or frequency if it is below a pre-set low threshold. Any stepwise adjustment of the voltage/frequency is calibrated according to CPU utilization, in relation to the pre-set high and low thresholds. In determining CPU utilization, the program queries the operating system periodically for an enumeration of the tasks that are running (including operating system tasks), and obtains execution statistics for each task (such as the time each task spends executing, and any priority level). For each task, the operating system provides the cumulative amount of CPU time used since task initiation. Such sampling may span several subtask durations, disclosed to be less than 100 milliseconds. Averaging of utilization information for multiple samplings may be performed to “level off” changes of performance setting, if fluctuation is undesirable. The program then creates a utilization index for comparison to the high and low thresholds. Voltage is increase on a CPU-wide basis, rather than to each processing unit or on a per-task basis. The value of obtaining per-task information is primarily to exclude unimportant tasks from the equation (or averaging), or to downgrade or delay their processing.
Like the Cox patent, it can perhaps be inferred that both the Tobias patents and the Altmejd patent have most utility in smaller, battery powered devices, or in a computing environment dominated by multitasking of a short or “bursty nature”. (Tobias patents, column 5 line 10.)
U.S. Pat. No. 6,442,700 issued to Chang et al. (the “Chang patent”) discloses a windows-based power management method for optimally distributing power for various tasks in a portable device. The method includes categorizing each task to be executed, prescribing a power management policy for the portable device, and distributing shares of electricity among the tasks based on the task category; then, in response to GUI input commands from users, increasing power to that task running within an active window of the portable device. The Chang patent essentially re-prioritizes previously prioritized tasks in a queue, by moving user-interactive tasks (in an active window) to the immediate attention of the processing unit while delaying processing of other tasks deemed less important at the time (such as those of batch programs).
U.S. Pat. No. 7,469,355 issued to Chong discloses a system for dynamically overclocking a processor by monitoring an activity measure for a specific operation (such as a count of instruction or data cache accesses by the CPU), evaluating that measure to determine whether it meets a pre-defined level of processor activity, and (if so) dynamically adjusting the clock rate of the processor to modify the execution speed at which the processor carries out instructions. Evaluation of an activity measure may include combining it with a durational measure (such as a count of executed clock cycles) to produce a ratio, and determining whether the ratio has reached a pre-defined level. The clock rate may be adjustable to a plurality of predefined clock rates, based on evaluation of the activity measure. For example, if the activity measure is above a high threshold, indicating that the processor is very active, the system may increase the clock rate of the circuitry to a higher pre-set speed, to allow the CPU to operate at a greater speed until a temperature threshold is exceeded. Conversely, if the activity measure is below a low threshold, indicating that the processor has experienced a low level of activity, the system may decrease the clock rate or return it to a nominal rate such as the manufacturer suggested clock rate.
U.S. Pat. No. 6,442,700 issued to Cooper (the “Cooper patent”) discloses thermal control within computer systems having multiple CPU performance states, wherein the computer initially executes user threads (multiple tasks) while in a high performance state (fastest processing possible for the power supply and thermal cooling capabilities) and, when a pre-set thermal threshold is exceeded, the processor transitions to a low power state (to conserve power and reduce heat) and executes user threads until it determines that it is below the thermal threshold so that a transition to a high performance state is possible. The shift between performance states may be as a function of voltage level supplied to the processor.
Published U.S. patent application Ser. No. 11/026,838 issued to Duberstein et al (Publication No. 2006/0161375, “Duberstein”) discloses a method of optimizing processing speed base on temperature, by comparing a first processing core temperature to a first threshold and to a second threshold temperature, then comparing a second processor core temperature to the first and second thresholds. If the temperature of either core is below the first threshold, Duberstein increases the speed of that core.
None of the cited patents disclose determining whether the current task PID matches that of a previously-optimized task PID and counting the number of operations completed during a subtask duration, and if no match is found, (1) increasing the voltage to the processing unit by an increment dependent upon its die size and counting the number of operations completed during a subsequent subtask duration, then (2) determining whether the complete-operations count for the subsequent subtask duration exceeds that of the immediately preceding subtask duration so that further repetition of (1) and (2) may further optimize the completion of computing operations, or alternatively determining whether the most recent count does not exceed the previous count (or average or weighted score of previous counts) so that the voltage level and completed-operations count of the most recent subtask duration should be saved in association with its task PID. Moreover, none of the cited patents disclose, if a matching PID is found, (A) counting the number of operations completed during the subtask duration at the voltage level associated with the matching PID and (B) determining whether the completed-operations count is equal to that associated with the matching task identifier so that processing will continue at said voltage supply level, or alternatively determining whether the completed-operations count is equal to that associated with the matching task identifier so that further repetition of (1) and (2) may further optimize the completion of computing operations.